Standard

Sequential 3D : Key integration challenges and opportunities for advanced semiconductor scaling. / Vandooren, A.; Witters, L.; Franco, J.; Mallik, A.; Parvais, B.; Wu, Z.; Walke, A.; Deshpande, V.; Rosseel, E.; Hikavyy, A.; Li, W.; Peng, L.; Rassoul, N.; Jamieson, G.; Inoue, F.; Verbinnen, G.; Devriendt, K.; Teugels, L.; Heylen, N.; Vecchio, E.; Zheng, T.; Waldron, N.; De Heyn, V.; Mocuta, D.; Collaert, N.

ICICDT 2018 - International Conference on IC Design and Technology, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. p. 145-148 (ICICDT 2018 - International Conference on IC Design and Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference paper

Harvard

Vandooren, A, Witters, L, Franco, J, Mallik, A, Parvais, B, Wu, Z, Walke, A, Deshpande, V, Rosseel, E, Hikavyy, A, Li, W, Peng, L, Rassoul, N, Jamieson, G, Inoue, F, Verbinnen, G, Devriendt, K, Teugels, L, Heylen, N, Vecchio, E, Zheng, T, Waldron, N, De Heyn, V, Mocuta, D & Collaert, N 2018, Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. in ICICDT 2018 - International Conference on IC Design and Technology, Proceedings. ICICDT 2018 - International Conference on IC Design and Technology, Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 145-148, 2018 International Conference on IC Design and Technology, ICICDT 2018, Otranto, Italy, 4/06/18. https://doi.org/10.1109/ICICDT.2018.8399777

APA

Vandooren, A., Witters, L., Franco, J., Mallik, A., Parvais, B., Wu, Z., ... Collaert, N. (2018). Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. In ICICDT 2018 - International Conference on IC Design and Technology, Proceedings (pp. 145-148). (ICICDT 2018 - International Conference on IC Design and Technology, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICICDT.2018.8399777

Vancouver

Vandooren A, Witters L, Franco J, Mallik A, Parvais B, Wu Z et al. Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. In ICICDT 2018 - International Conference on IC Design and Technology, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2018. p. 145-148. (ICICDT 2018 - International Conference on IC Design and Technology, Proceedings). https://doi.org/10.1109/ICICDT.2018.8399777

Author

Vandooren, A. ; Witters, L. ; Franco, J. ; Mallik, A. ; Parvais, B. ; Wu, Z. ; Walke, A. ; Deshpande, V. ; Rosseel, E. ; Hikavyy, A. ; Li, W. ; Peng, L. ; Rassoul, N. ; Jamieson, G. ; Inoue, F. ; Verbinnen, G. ; Devriendt, K. ; Teugels, L. ; Heylen, N. ; Vecchio, E. ; Zheng, T. ; Waldron, N. ; De Heyn, V. ; Mocuta, D. ; Collaert, N. / Sequential 3D : Key integration challenges and opportunities for advanced semiconductor scaling. ICICDT 2018 - International Conference on IC Design and Technology, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 145-148 (ICICDT 2018 - International Conference on IC Design and Technology, Proceedings).

BibTeX

@inproceedings{56f2854fef134f20927aecc724bc480c,
title = "Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling",
abstract = "In this paper, we review the current progress on 3D sequential device stacking, highlighting the main integration challenges and the possible technological solutions. Next, we explore the potential benefits of 3D sequential stacking at transistor level, CMOS level and for hybrid circuits.",
keywords = "3D sequential, junctionless, silicon-on-insulator, thermal budget, wafer bonding",
author = "A. Vandooren and L. Witters and J. Franco and A. Mallik and B. Parvais and Z. Wu and A. Walke and V. Deshpande and E. Rosseel and A. Hikavyy and W. Li and L. Peng and N. Rassoul and G. Jamieson and F. Inoue and G. Verbinnen and K. Devriendt and L. Teugels and N. Heylen and E. Vecchio and T. Zheng and N. Waldron and {De Heyn}, V. and D. Mocuta and N. Collaert",
year = "2018",
month = "6",
day = "27",
doi = "10.1109/ICICDT.2018.8399777",
language = "English",
isbn = "9781538625491",
series = "ICICDT 2018 - International Conference on IC Design and Technology, Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "145--148",
booktitle = "ICICDT 2018 - International Conference on IC Design and Technology, Proceedings",
address = "United States",

}

RIS

TY - GEN

T1 - Sequential 3D

T2 - Key integration challenges and opportunities for advanced semiconductor scaling

AU - Vandooren, A.

AU - Witters, L.

AU - Franco, J.

AU - Mallik, A.

AU - Parvais, B.

AU - Wu, Z.

AU - Walke, A.

AU - Deshpande, V.

AU - Rosseel, E.

AU - Hikavyy, A.

AU - Li, W.

AU - Peng, L.

AU - Rassoul, N.

AU - Jamieson, G.

AU - Inoue, F.

AU - Verbinnen, G.

AU - Devriendt, K.

AU - Teugels, L.

AU - Heylen, N.

AU - Vecchio, E.

AU - Zheng, T.

AU - Waldron, N.

AU - De Heyn, V.

AU - Mocuta, D.

AU - Collaert, N.

PY - 2018/6/27

Y1 - 2018/6/27

N2 - In this paper, we review the current progress on 3D sequential device stacking, highlighting the main integration challenges and the possible technological solutions. Next, we explore the potential benefits of 3D sequential stacking at transistor level, CMOS level and for hybrid circuits.

AB - In this paper, we review the current progress on 3D sequential device stacking, highlighting the main integration challenges and the possible technological solutions. Next, we explore the potential benefits of 3D sequential stacking at transistor level, CMOS level and for hybrid circuits.

KW - 3D sequential

KW - junctionless

KW - silicon-on-insulator

KW - thermal budget

KW - wafer bonding

UR - http://www.scopus.com/inward/record.url?scp=85050290600&partnerID=8YFLogxK

U2 - 10.1109/ICICDT.2018.8399777

DO - 10.1109/ICICDT.2018.8399777

M3 - Conference paper

AN - SCOPUS:85050290600

SN - 9781538625491

T3 - ICICDT 2018 - International Conference on IC Design and Technology, Proceedings

SP - 145

EP - 148

BT - ICICDT 2018 - International Conference on IC Design and Technology, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

ID: 40026077