Standard

Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware. / Akram, Shoaib; Sartor, Jennifer; McKinley, Kathryn S; Eeckhout, Lieven.

2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). IEEE, 2019. p. 93-105 8695664 (Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019).

Research output: Chapter in Book/Report/Conference proceedingConference paperResearch

Harvard

Akram, S, Sartor, J, McKinley, KS & Eeckhout, L 2019, Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware. in 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)., 8695664, Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019, IEEE, pp. 93-105, 2010 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Madison, United States, 24/03/19. https://doi.org/10.1109/ISPASS.2019.00017

APA

Akram, S., Sartor, J., McKinley, K. S., & Eeckhout, L. (2019). Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware. In 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) (pp. 93-105). [8695664] (Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019). IEEE. https://doi.org/10.1109/ISPASS.2019.00017

Vancouver

Akram S, Sartor J, McKinley KS, Eeckhout L. Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware. In 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). IEEE. 2019. p. 93-105. 8695664. (Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019). https://doi.org/10.1109/ISPASS.2019.00017

Author

Akram, Shoaib ; Sartor, Jennifer ; McKinley, Kathryn S ; Eeckhout, Lieven. / Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware. 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). IEEE, 2019. pp. 93-105 (Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019).

BibTeX

@inproceedings{e349bc568cdd44f9b892e10b8748f027,
title = "Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware",
abstract = "Non-volatile memory (NVM) has the potential to become a mainstream memory technology and challenge DRAM. Researchers evaluating the speed, endurance, and abstractions of hybrid memories with DRAM and NVM typically use simulation, making it easy to evaluate the impact of different hardware technologies and parameters. Simulation is, however, extremely slow, limiting the applications and datasets in the evaluation. Simulation also precludes critical workloads, especially those written in managed languages such as Java and C#. Good methodology embraces a variety of techniques for evaluating new ideas, expanding the experimental scope, and uncovering new insights. This paper introduces a platform to emulate hybrid memory for managed languages using commodity NUMA servers. Emulation complements simulation but offers richer software experimentation. We use a thread-local socket to emulate DRAM and a remote socket to emulate NVM. We use standard C library routines to allocate heap memory on the DRAM and NVM sockets for use with explicit memory management or garbage collection. We evaluate the emulator using various configurations of write-rationing garbage collectors that improve NVM lifetimes by limiting writes to NVM, using 15 applications and various datasets and workload configurations. We show emulation and simulation confirm each other's trends in terms of writes to NVM for different software configurations, increasing our confidence in predicting future system effects. Emulation brings novel insights, such as the non-linear effects of multi-programmed workloads on NVM writes, and that Java applications write significantly more than their C++ equivalents. We make our software infrastructure publicly available to advance the evaluation of novel memory management schemes on hybrid memories.",
author = "Shoaib Akram and Jennifer Sartor and McKinley, {Kathryn S} and Lieven Eeckhout",
year = "2019",
month = "4",
day = "22",
doi = "10.1109/ISPASS.2019.00017",
language = "English",
isbn = "978-1-7281-0747-9",
series = "Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019",
publisher = "IEEE",
pages = "93--105",
booktitle = "2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)",

}

RIS

TY - GEN

T1 - Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware

AU - Akram, Shoaib

AU - Sartor, Jennifer

AU - McKinley, Kathryn S

AU - Eeckhout, Lieven

PY - 2019/4/22

Y1 - 2019/4/22

N2 - Non-volatile memory (NVM) has the potential to become a mainstream memory technology and challenge DRAM. Researchers evaluating the speed, endurance, and abstractions of hybrid memories with DRAM and NVM typically use simulation, making it easy to evaluate the impact of different hardware technologies and parameters. Simulation is, however, extremely slow, limiting the applications and datasets in the evaluation. Simulation also precludes critical workloads, especially those written in managed languages such as Java and C#. Good methodology embraces a variety of techniques for evaluating new ideas, expanding the experimental scope, and uncovering new insights. This paper introduces a platform to emulate hybrid memory for managed languages using commodity NUMA servers. Emulation complements simulation but offers richer software experimentation. We use a thread-local socket to emulate DRAM and a remote socket to emulate NVM. We use standard C library routines to allocate heap memory on the DRAM and NVM sockets for use with explicit memory management or garbage collection. We evaluate the emulator using various configurations of write-rationing garbage collectors that improve NVM lifetimes by limiting writes to NVM, using 15 applications and various datasets and workload configurations. We show emulation and simulation confirm each other's trends in terms of writes to NVM for different software configurations, increasing our confidence in predicting future system effects. Emulation brings novel insights, such as the non-linear effects of multi-programmed workloads on NVM writes, and that Java applications write significantly more than their C++ equivalents. We make our software infrastructure publicly available to advance the evaluation of novel memory management schemes on hybrid memories.

AB - Non-volatile memory (NVM) has the potential to become a mainstream memory technology and challenge DRAM. Researchers evaluating the speed, endurance, and abstractions of hybrid memories with DRAM and NVM typically use simulation, making it easy to evaluate the impact of different hardware technologies and parameters. Simulation is, however, extremely slow, limiting the applications and datasets in the evaluation. Simulation also precludes critical workloads, especially those written in managed languages such as Java and C#. Good methodology embraces a variety of techniques for evaluating new ideas, expanding the experimental scope, and uncovering new insights. This paper introduces a platform to emulate hybrid memory for managed languages using commodity NUMA servers. Emulation complements simulation but offers richer software experimentation. We use a thread-local socket to emulate DRAM and a remote socket to emulate NVM. We use standard C library routines to allocate heap memory on the DRAM and NVM sockets for use with explicit memory management or garbage collection. We evaluate the emulator using various configurations of write-rationing garbage collectors that improve NVM lifetimes by limiting writes to NVM, using 15 applications and various datasets and workload configurations. We show emulation and simulation confirm each other's trends in terms of writes to NVM for different software configurations, increasing our confidence in predicting future system effects. Emulation brings novel insights, such as the non-linear effects of multi-programmed workloads on NVM writes, and that Java applications write significantly more than their C++ equivalents. We make our software infrastructure publicly available to advance the evaluation of novel memory management schemes on hybrid memories.

UR - http://www.scopus.com/inward/record.url?scp=85065412729&partnerID=8YFLogxK

U2 - 10.1109/ISPASS.2019.00017

DO - 10.1109/ISPASS.2019.00017

M3 - Conference paper

SN - 978-1-7281-0747-9

T3 - Proceedings - 2019 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2019

SP - 93

EP - 105

BT - 2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

PB - IEEE

ER -

ID: 45784097