Many applications rely on MEMS microphone arrays for locating sound sources prior to their execution. Those applications are not only executed under real-time constraints but are often embedded on low-power devices. These environments become challenging when increasing the number of microphones or requiring dynamic responses. Field-Programmable Gate Arrays (FPGAs) are usually chosen due to their flexibility and computational power. This work intends to guide the design of reconfigurable acoustic beamforming architectures, which are not only able to accurately determining the sound Direction-Of-Arrival (DoA) but are also capable to satisfy the most demanding
applications in terms of power efficiency. Design considerations of the required operations performing the sound location are discussed and analysed in order to facilitate the elaboration of reconfigurable acoustic beamforming architectures. Performance strategies are proposed and evaluated based on
the characteristics of the presented architecture. This power-efficient architecture is compared to a different architecture prioritizing performance in order to reveal the unavoidable design trade-offs.
Original languageEnglish
Pages (from-to)1-27
Number of pages27
JournalJournal of Sensors
Publication statusPublished - 26 Jul 2019

    Research areas

  • Design Exploration, Low Power, FPGA, Reconfigurable Architectures, Delay and Sum Beamforming, Microphone Arrays, Sound Source Localization, PDM MEMS microphones

ID: 46781162