Noah Van Es - Participant

Safety-critical computers increasingly affect nearly every aspect of our lives. Computers control the planes we fly on, monitor our health in hospitals and do our work in hazardous environments. Computers with software deficiencies have resulted in catastrophic failures. The goal of formal verification is to to improve the safety and reliability of such hardware and software systems.

Formal Verification is the study of algorithms and structures applicable to the verification of hardware and software designs. It draws upon ideas and results from logic, graph theory, and automata theory, and combines theoretical and experimental aspects. While 30 years ago this was a subject of academic interest only, today, many companies use formal verification as an integral part of the development process.

The IIAS Winter School on Formal Verification would bring together several leading researchers to cover the mathematicall and algorithmic foundations of the field, as well as to discuss its application in industry, and its impact on related areas in computer science.
17 Dec 201721 Dec 2017

The 2nd Winter School in Engineering and Computer Science on Formal Verification

Abbreviated titleCSE2 Winter School on Formal Verification
Duration17 Dec 201721 Dec 2017
Location of eventHebrew University
Web address (URL)
Degree of recognitionInternational event

Event: Other

ID: 37191866